314 lines
9.3 KiB
C
314 lines
9.3 KiB
C
/**
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* Copyright (C) 2009 Ubixum, Inc.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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**/
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#include <stdio.h> // NOTE this needs deleted
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#include <fx2regs.h>
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#include <fx2macros.h>
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#include <i2c.h>
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#include <delay.h>
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//#define DEBUG_I2C 1
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#ifdef DEBUG_I2C
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#define i2c_printf(...) printf(__VA_ARGS__)
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#else
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#define i2c_printf(...)
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#endif
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volatile __xdata BOOL cancel_i2c_trans;
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#define CHECK_I2C_CANCEL() if (cancel_i2c_trans) return FALSE
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/**
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*
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1. Set START=1. If BERR=1, start timer*.
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2. Write the 7-bit peripheral address and the direction bit (0 for a write) to I2DAT.
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3. Wait for DONE=1 or for timer to expire*. If BERR=1, go to step 1.
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4. If ACK=0, go to step 9.
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5. Load I2DAT with a data byte.
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6. Wait for DONE=1*. If BERR=1, go to step 1.
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7. If ACK=0, go to step 9.
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8. Repeat steps 5-7 for each byte until all bytes have been transferred.
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9. Set STOP=1. Wait for STOP = 0 before initiating another transfer.
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**/
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BOOL
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i2c_write(BYTE addr, WORD len, BYTE * addr_buf, WORD len2, BYTE * data_buf)
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{
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WORD cur_byte;
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WORD total_bytes = len + len2; // NOTE overflow error?
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BYTE retry_count = 2; // two tries to write address/read ack
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cancel_i2c_trans = FALSE;
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//BOOL wait=FALSE; // use timer if needed
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// 1. Set START=1. If BERR=1, start timer*.
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step1:
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CHECK_I2C_CANCEL();
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cur_byte = 0;
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I2CS |= bmSTART;
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if (I2CS & bmBERR) {
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i2c_printf("Woops.. need to do the timer\n");
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delay(10); // way too long probably
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goto step1;
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}
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// 2. Write the 7-bit peripheral address and the direction bit (0 for a write) to I2DAT.
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I2DAT = addr << 1;
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// 3. Wait for DONE=1 or for timer to expire*. If BERR=1, go to step 1.
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while (!(I2CS & bmDONE) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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if (I2CS & bmBERR) {
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i2c_printf("bmBERR, going to step 1\n");
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goto step1;
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}
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// 4. If ACK=0, go to step 9.
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if (!(I2CS & bmACK)) {
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I2CS |= bmSTOP;
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while ((I2CS & bmSTOP) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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--retry_count;
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if (!retry_count) {
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i2c_printf("No ack after writing address.! Fail\n");
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return FALSE;
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}
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delay(10);
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goto step1;
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}
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// 8. Repeat steps 5-7 for each byte until all bytes have been transferred.
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while (cur_byte < total_bytes) {
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// 5. Load I2DAT with a data byte.
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I2DAT =
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cur_byte <
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len ? addr_buf[cur_byte] : data_buf[cur_byte - len];
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++cur_byte;
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// 6. Wait for DONE=1*. If BERR=1, go to step 1.
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while (!(I2CS & bmDONE) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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if (I2CS & bmBERR) {
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i2c_printf("bmBERR on byte %d. Going to step 1\n",
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cur_byte - 1);
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goto step1;
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//return FALSE;
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}
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// 7. If ACK=0, go to step 9.
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if (!(I2CS & bmACK)) {
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I2CS |= bmSTOP;
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while ((I2CS & bmSTOP) && !cancel_i2c_trans);
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i2c_printf("No Ack after byte %d. Fail\n", cur_byte - 1);
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return FALSE;
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}
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}
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// 9. Set STOP=1. Wait for STOP = 0 before initiating another transfer.
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//real step 9
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I2CS |= bmSTOP;
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while ((I2CS & bmSTOP) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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return TRUE;
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}
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/*
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trm 13.4.4
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1. Set START=1. If BERR = 1, start timer*.
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2. Write the 7-bit peripheral address and the direction bit (1 for a read) to I2DAT.
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3. Wait for DONE=1 or for timer to expire*. If BERR=1, go to step 1.
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4. If ACK=0, set STOP=1 and go to step 15.
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5. Read I2DAT to initiate the first burst of nine SCL pulses to clock in the first byte from the slave.
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Discard the value that was read from I2DAT.
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6. Wait for DONE=1. If BERR=1, go to step 1.
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7. Read the just-received byte of data from I2DAT. This read also initiates the next read transfer.
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8. Repeat steps 6 and 7 for each byte until ready to read the second-to-last byte.
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9. Wait for DONE=1. If BERR=1, go to step 1.
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10. Before reading the second-to-last I2DAT byte, set LASTRD=1.
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11. Read the second-to-last byte from I2DAT. With LASTRD=1, this initiates the final byte read on
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the bus.
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12. Wait for DONE=1. If BERR=1, go to step 1.
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13. Set STOP=1.
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14. Read the final byte from I2DAT immediately (the next instruction) after setting the STOP bit. By
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reading I2DAT while the "stop" condition is being generated, the just-received data byte will be
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retrieved without initiating an extra read transaction (nine more SCL pulses) on the I²Cbus.
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15. Wait for STOP = 0 before initiating another transfer
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*/
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/*
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* timer should be at least as long as longest start-stop interval on the bus
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serial clock for i2c bus runs at 100khz by default and can run at 400khz for devices that support it
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start-stop interval is about 9 serial clock cycles
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400KHZ bit 0=100khz, 1=400khz
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how many cycles at XTAL cycles/second = 9 cycles at 400k (or 100k) cycles/second
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timeout = n i2c cycles / I2C cycles/sec = timeout seconds
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timeout seconds * XTAL cycles/sec = XTAL cycles
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9 / 400 (or 100) * (XTAL)
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*/
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BOOL
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i2c_read(BYTE addr, WORD len, BYTE * buf)
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{
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BYTE tmp;
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WORD cur_byte;
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cancel_i2c_trans = FALSE;
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//WORD timeout_cycles = (WORD)(9.0 * XTAL / I2CFREQ );
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// 1. Set START=1. If BERR = 1, start timer*.
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start:
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CHECK_I2C_CANCEL();
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cur_byte = 0;
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I2CS |= bmSTART;
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if (I2CS & bmBERR) {
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i2c_printf("Woops, step1 BERR, need to do timeout\n");
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delay(10); // NOTE way too long
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goto start;
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}
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// 2. Write the 7-bit peripheral address and the direction bit (1 for a read) to I2DAT.
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I2DAT = (addr << 1) | 1; // last 1 for read
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// 3. Wait for DONE=1 or for timer to expire*. If BERR=1, go to step 1.
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while (!(I2CS & bmDONE) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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if (I2CS & bmBERR)
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goto start;
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// 4. If ACK=0, set STOP=1 and go to step 15.
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if (!(I2CS & bmACK)) {
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I2CS |= bmSTOP;
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while ((I2CS & bmSTOP) && !cancel_i2c_trans);
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return FALSE;
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}
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// with only one byte to read, this needs set here.
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// (In this case, the tmp read is the 2nd to last read)
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if (len == 1)
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I2CS |= bmLASTRD;
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// 5. Read I2DAT to initiate the first burst of nine SCL pulses to clock in the first byte from the slave.
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// Discard the value that was read from I2DAT.
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tmp = I2DAT; // discard read
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while (len > cur_byte + 1) { // reserve last byte read for after the loop
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// 6. Wait for DONE=1. If BERR=1, go to step 1.
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// 9. Wait for DONE=1. If BERR=1, go to step 1.
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while (!(I2CS & bmDONE) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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if (I2CS & bmBERR)
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goto start;
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// 10. Before reading the second-to-last I2DAT byte, set LASTRD=1.
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if (len == cur_byte + 2) // 2nd to last byte
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I2CS |= bmLASTRD;
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// 7. Read the just-received byte of data from I2DAT. This read also initiates the next read transfer.
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// 11. Read the second-to-last byte from I2DAT. With LASTRD=1, this initiates the final byte read on
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// the bus.
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buf[cur_byte++] = I2DAT;
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// 8. Repeat steps 6 and 7 for each byte until ready to read the second-to-last byte.
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}
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//12. Wait for DONE=1. If BERR=1, go to step 1.
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while (!(I2CS & bmDONE) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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if (I2CS & bmBERR)
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goto start;
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// 13. Set STOP=1.
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I2CS |= bmSTOP;
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// 14. Read the final byte from I2DAT immediately (the next instruction) after setting the STOP bit. By
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// reading I2DAT while the "stop" condition is being generated, the just-received data byte will be
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// retrieved without initiating an extra read transaction (nine more SCL pulses) on the I²Cbus.
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buf[cur_byte] = I2DAT; // use instead of buffer addressing so next instruction reads I2DAT
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while ((I2CS & bmSTOP) && !cancel_i2c_trans);
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CHECK_I2C_CANCEL();
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return TRUE;
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}
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BOOL
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eeprom_write(BYTE prom_addr, WORD addr, WORD length, BYTE * buf)
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{
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BYTE addr_len = 0;
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// 1st bytes of buffer are address and next byte is value
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BYTE data_buffer[3];
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WORD cur_byte = 0;
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#ifdef DEBUG_I2C
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if (EEPROM_TWO_BYTE) {
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i2c_printf("Two Byte EEProm Address detected.\n");
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} else {
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i2c_printf("Single Byte EEProm address detected.\n");
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}
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#endif
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while (cur_byte < length) {
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addr_len = 0;
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if (EEPROM_TWO_BYTE) {
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data_buffer[addr_len++] = MSB(addr);
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}
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data_buffer[addr_len++] = LSB(addr);
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data_buffer[addr_len++] = buf[cur_byte++];
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i2c_printf("%02x ", data_buffer[addr_len - 1]);
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if (!i2c_write(prom_addr, addr_len, data_buffer, 0, NULL))
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return FALSE;
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++addr; // next byte goes to next address
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}
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return TRUE;
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}
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BOOL
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eeprom_read(BYTE prom_addr, WORD addr, WORD length, BYTE * buf)
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{
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BYTE eeprom_addr[2];
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BYTE addr_len = 0;
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if (EEPROM_TWO_BYTE)
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eeprom_addr[addr_len++] = MSB(addr);
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eeprom_addr[addr_len++] = LSB(addr);
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// write the address we want to read to the prom
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//printf ("Starting Addr Write with addr len %d\n", addr_len);
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if (!i2c_write(prom_addr, addr_len, eeprom_addr, 0, NULL))
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return FALSE;
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//printf ( "Starting read\n" );
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if (!i2c_read(prom_addr, length, buf))
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return FALSE;
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return TRUE;
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}
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