81 lines
2.9 KiB
VHDL
81 lines
2.9 KiB
VHDL
-- -----------------------------------------------------------------------------
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-- Copyright (c) 2013 Benjamin Krill <benjamin@krll.de>
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--
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-- Permission is hereby granted, free of charge, to any person obtaining a copy
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-- of this software and associated documentation files (the "Software"), to deal
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-- in the Software without restriction, including without limitation the rights
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-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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-- copies of the Software, and to permit persons to whom the Software is
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-- furnished to do so, subject to the following conditions:
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--
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-- The above copyright notice and this permission notice shall be included in
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-- all copies or substantial portions of the Software.
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--
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-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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-- THE SOFTWARE.
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-- -----------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use std.textio.all;
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use ieee.std_logic_textio.all;
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entity i2c_rom is
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port (
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clk : in std_logic;
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rst_n : in std_logic;
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sda_i : in std_logic;
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sda_o : out std_logic;
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scl_i : in std_logic
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);
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end i2c_rom;
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architecture i2c_rom of i2c_rom is
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--type rom_t is array (0 to 255) of std_logic_vector (7 downto 0);
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type rom_t is array (0 to 127) of std_logic_vector (7 downto 0);
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impure function init_rom_from_file(filename : in string) return rom_t is
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file romfile : text is in filename;
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variable rline : line;
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variable rom : rom_t;
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begin
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for i in rom_t'range loop
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readline(romfile, rline);
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hread(rline, rom(i));
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end loop;
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return rom;
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end function;
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--signal rom : rom_t := init_rom_from_file("hdmi_in_syncmaster940t.dat");
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signal rom : rom_t := init_rom_from_file("hdmi_in_syncmaster191t.dat");
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signal rd_data : std_logic_vector(7 downto 0);
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signal wr_data : std_logic_vector(7 downto 0);
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signal address : std_logic_vector(7 downto 0);
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signal wr_pulse : std_logic;
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signal rd_pulse : std_logic;
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signal rd_wr : std_logic;
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begin
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rd_data <= rom(to_integer(unsigned(address)));
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i2c_blk_0: entity work.i2c_slave
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generic map ( ADDRESS => "0101000" ) -- 6A write, 6B read
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port map (
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clk => clk,
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rst_n => rst_n,
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sda_i => sda_i,
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sda_o => sda_o,
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scl_i => scl_i,
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rd_dat_i => rd_data,
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addr_o => address,
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wr_dat_o => wr_data,
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wr_pulse_o => wr_pulse,
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rd_pulse_o => rd_pulse,
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rd_wr_o => rd_wr
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);
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end i2c_rom;
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