From 05489c97fb98c4edaba242f8133de17f8677945c Mon Sep 17 00:00:00 2001 From: Benjamin Krill Date: Thu, 6 Mar 2014 17:32:45 +0100 Subject: [PATCH] add compiling first HPS design and basic instantiation. --- fpga/.gitignore | 2 + fpga/soc/soc_system.qsys | 1202 ++++++++++++++++++++++++++++++++++++++ fpga/syn/Makefile | 88 +++ fpga/syn/sockit.qpf_tmpl | 3 + fpga/syn/sockit.qsf_tmpl | 746 +++++++++++++++++++++++ fpga/top/sockit.qip | 2 + fpga/top/sockit.sdc | 117 ++++ fpga/top/sockit.vhd | 299 ++++++++++ 8 files changed, 2459 insertions(+) create mode 100644 fpga/.gitignore create mode 100644 fpga/soc/soc_system.qsys create mode 100644 fpga/syn/Makefile create mode 100644 fpga/syn/sockit.qpf_tmpl create mode 100644 fpga/syn/sockit.qsf_tmpl create mode 100644 fpga/top/sockit.qip create mode 100644 fpga/top/sockit.sdc create mode 100644 fpga/top/sockit.vhd diff --git a/fpga/.gitignore b/fpga/.gitignore new file mode 100644 index 0000000..863025c --- /dev/null +++ b/fpga/.gitignore @@ -0,0 +1,2 @@ +soc/.qsys_edit/ +syn/build_*/ diff --git a/fpga/soc/soc_system.qsys b/fpga/soc/soc_system.qsys new file mode 100644 index 0000000..42be191 --- /dev/null +++ b/fpga/soc/soc_system.qsys @@ -0,0 +1,1202 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0x000000000000000000 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + No,No,No,No,No,No,No,No + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Yes,No,No,No,No,No,No,No,No,Yes,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,Yes,No,No,No,No,No,No,No,No,No,No,No,No,Yes,No,No,No,No,Yes,Yes,Yes,Yes,No,No,No,No,Yes,Yes,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No + No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + INTERACTIVE_ASCII_OUTPUT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Automatic Switchover + + + + + + + Create an adjpllin signal to connect with an upstream PLL + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/fpga/syn/Makefile b/fpga/syn/Makefile new file mode 100644 index 0000000..02a1fb9 --- /dev/null +++ b/fpga/syn/Makefile @@ -0,0 +1,88 @@ +# ############################################# +# (2014) Benjamin Krill +# ############################################# +PWD = $(shell pwd) +ifndef TOP + TOP = $(shell while ! test -d syn; do cd .. ; done; pwd) + export TOP +endif + +PROJECT := sockit +BUILD_DIR := $(PWD)/build_$(PROJECT) +BUILD_QUARTUS_DIR := $(BUILD_DIR)/quartus + +##### SOURCE FILES ############################ +SOURCE_QIP = $(TOP)/top/$(PROJECT).qip + +##### DEFAULT ################################# +.PHONY: default +default: help + +##### QSYS #################################### +.PHONY: qsys-generate qsys-edit + +QSYS_FILE := $(TOP)/soc/soc_system.qsys +QSYS_BASE := $(basename $(notdir $(QSYS_FILE))) +QSYS_OUTDIR := $(BUILD_DIR)/$(QSYS_BASE) +QSYS_QIP := $(QSYS_OUTDIR)/$(QSYS_BASE).qip +QSYS_SOPCINFO := $(QSYS_OUTDIR)/$(QSYS_BASE).sopcinfo +SOURCE_QIP += $(QSYS_QIP) + +$(QSYS_QIP) qsys-generate: config $(QSYS_FILE) + ip-generate \ + --component-file=$(QSYS_FILE) \ + --file-set=QUARTUS_SYNTH \ + --output-name=$(QSYS_BASE) \ + --output-directory=$(QSYS_OUTDIR) \ + --reportfile=sopcinfo:$(QSYS_SOPCINFO) \ + --reportfile=qip:$(QSYS_QIP) \ + --language=vhdl + touch $(QSYS_QIP) + +qsys-edit: $(QSYS_FILE) + qsys-edit $^ & + +HELP_TARGETS += qsys-generate qsys-edit +qsys-generate.HELP := Generate current QSYS implementation +qsys-edit.HELP := Edit QSYS implementation + +##### QUARTUS ################################### +QUARTUS_QPF := $(PROJECT).qpf +QUARTUS_QSF := $(PROJECT).qsf + +tcl: $(BUILD_QUARTUS_DIR)/$(PROJECT).qsf $(BUILD_QUARTUS_DIR)/$(PROJECT).qpf + @cd $(BUILD_QUARTUS_DIR) && for pin_assign_tcl_file in $$(find $(BUILD_DIR) -name '*_pin_assignments.tcl'); do \ + quartus_map $(QUARTUS_QPF); \ + echo "Applying $${pin_assign_tcl_file} to $(QUARTUS_QPF)..."; \ + quartus_sta -t $${pin_assign_tcl_file} $(QUARTUS_QPF); \ + done + +$(BUILD_QUARTUS_DIR)/output_files/sockit.sof quartus: tcl + cd $(BUILD_QUARTUS_DIR) && quartus_sh --flow compile $(QUARTUS_QPF) + +##### CONFIGURE BUILD ########################### +.PHONY: config +config $(BUILD_QUARTUS_DIR)/$(PROJECT).qsf: + mkdir -p $(BUILD_QUARTUS_DIR) + cp $(PROJECT).qpf_tmpl $(BUILD_QUARTUS_DIR)/$(PROJECT).qpf + cp $(PROJECT).qsf_tmpl $(BUILD_QUARTUS_DIR)/$(PROJECT).qsf + for I in $(SOURCE_QIP); do \ + echo "set_global_assignment -name QIP_FILE $$I" >> $(BUILD_QUARTUS_DIR)/$(PROJECT).qsf; \ + done + +HELP_TARGETS += config +config.HELP := create build sandbox + +##### HELP ###################################### +.PHONY: $(HELP_TARGETS_X) help +HELP_TARGETS += help +help.HELP := Displays this info (i.e. the available targets) + +help: help-header help-targets +HELP_TARGETS_X := $(patsubst %,help-%,$(sort $(HELP_TARGETS))) +help-targets: $(HELP_TARGETS_X) +$(HELP_TARGETS_X): help-%: + @printf "\t%20s\t - %s\n" $* "$($*.HELP)" +help-header: + @printf "\t%20s\t - %s\n" target description\n + @printf "\t------------------------------------------------------------------------------\n" diff --git a/fpga/syn/sockit.qpf_tmpl b/fpga/syn/sockit.qpf_tmpl new file mode 100644 index 0000000..ffa531b --- /dev/null +++ b/fpga/syn/sockit.qpf_tmpl @@ -0,0 +1,3 @@ +QUARTUS_VERSION = "13.1.2" +DATE = "15:03:49 March 06, 2014" +PROJECT_REVISION = "sockit" diff --git a/fpga/syn/sockit.qsf_tmpl b/fpga/syn/sockit.qsf_tmpl new file mode 100644 index 0000000..8592a17 --- /dev/null +++ b/fpga/syn/sockit.qsf_tmpl @@ -0,0 +1,746 @@ +#### MAIN ############################################################################## +set_global_assignment -name FAMILY "Cyclone V" +set_global_assignment -name DEVICE 5CSXFC6D6F31C8ES +set_global_assignment -name TOP_LEVEL_ENTITY sockit +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1.2 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:03:48 MARCH 06, 2013" +set_global_assignment -name LAST_QUARTUS_VERSION 13.1.2 +set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 896 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256 +set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" +set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" + +set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON +set_global_assignment -name AUTO_OPEN_DRAIN_PINS OFF +set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS" +set_global_assignment -name FITTER_EFFORT "STANDARD FIT" +set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF +set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF +set_global_assignment -name USE_DLL_FREQUENCY_FOR_DQS_DELAY_CHAIN ON + +#### HPS ############################################################################### +set_global_assignment -name UNIPHY_SEQUENCER_DQS_CONFIG_ENABLE ON +set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON +set_global_assignment -name ECO_REGENERATE_REPORT ON +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" +set_global_assignment -name IOBANK_VCCIO 1.5V -section_id 4A +set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 3A +set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 7A +set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 7B +set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 7C +set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 7D + + +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|ureset|phy_reset_mem_stable_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|ureset|phy_reset_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[0].read_capture_clk_buffer -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[1].read_capture_clk_buffer -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[2].read_capture_clk_buffer -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[3].read_capture_clk_buffer -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name GLOBAL_SIGNAL OFF -to soc_0|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION_FOR_NON_GLOBAL_CLOCKS ON -to soc_0|hps_0|hps_io|border|hps_sdram_inst -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to soc_0|hps_0|hps_io|border|hps_sdram_inst|pll0|fbout -entity soc_system -tag __hps_sdram_p0 + +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d0 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d1 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d2 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d3 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d4 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d5 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d6 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_d7 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_dir +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_clk +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_stp +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_usb1_inst_nxt +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_uart0_inst_tx +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_uart0_inst_rx +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_qspi_inst_io0 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_qspi_inst_io1 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_qspi_inst_io2 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_qspi_inst_io3 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_qspi_inst_ss0 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_qspi_inst_clk +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_clk_in +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_cmd +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d0 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d1 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d2 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d3 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d4 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d5 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d6 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_d7 +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_pwren +set_instance_assignment -name io_standard "3.3-v lvcmos" -to hps_sdio_inst_clk +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim0_inst_miso +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim0_inst_mosi +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim0_inst_ss0 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim1_inst_clk +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim1_inst_miso +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim1_inst_mosi +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim1_inst_ss0 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_spim0_inst_clk +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_mdio +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_rxd0 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_rxd1 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_rxd2 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_rxd3 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_rx_clk +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_rx_ctl +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_txd0 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_txd1 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_txd2 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_txd3 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_tx_clk +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_tx_ctl +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_emac1_inst_mdc +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio09 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio35 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio48 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio53 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio54 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio55 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio56 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio61 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio62 +set_instance_assignment -name io_standard "3.3-v lvttl" -to hps_gpio_inst_gpio00 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ba -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dm -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_oct_rzqin -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to hps_0_hps_io_hps_io_i2c1_inst_SDA +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to hps_0_hps_io_hps_io_i2c1_inst_SCL + +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[4] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[4] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[5] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[5] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[6] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[6] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[7] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[7] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[8] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[8] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[9] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[9] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[10] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[10] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[11] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[11] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[12] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[12] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[13] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[13] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[14] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[14] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[15] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[15] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[16] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[16] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[17] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[17] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[18] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[18] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[19] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[19] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[20] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[20] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[21] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[21] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[22] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[22] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[23] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[23] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[24] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[24] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[25] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[25] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[26] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[26] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[27] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[27] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[28] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[28] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[29] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[29] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[30] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[30] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dq[31] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dq[31] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dqs_n[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to hps_mem_ck -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to hps_mem_ck_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[10] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[11] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[12] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[13] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[14] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[4] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[5] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[6] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[7] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[8] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_a[9] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_ba[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_ba[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_ba[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_cas_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_cke -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_cs_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_odt -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_ras_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_we_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to hps_mem_reset_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dm[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dm[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dm[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to hps_mem_dm[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[10] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[11] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[12] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[13] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[14] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[4] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[5] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[6] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[7] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[8] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_a[9] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ba[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ba[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ba[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_cas_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ck -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ck_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_cke -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_cs_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dm[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dm[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dm[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dm[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[10] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[11] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[12] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[13] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[14] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[15] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[16] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[17] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[18] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[19] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[20] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[21] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[22] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[23] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[24] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[25] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[26] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[27] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[28] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[29] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[30] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[31] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[4] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[5] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[6] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[7] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[8] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dq[9] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs_n[0] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs_n[1] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs_n[2] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_dqs_n[3] -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_odt -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_ras_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_reset_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name PACKAGE_SKEW_COMPENSATION ON -to hps_mem_we_n -entity soc_system -tag __hps_sdram_p0 +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to hps_i2c1_inst_sda +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to hps_i2c1_inst_scl + +### FPGA LOGIC +set_location_assignment PIN_Y26 -to clk_100 +set_location_assignment PIN_K14 -to clk_50 +set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_100 +set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_50 +set_location_assignment PIN_AA16 -to clk_top1 +set_location_assignment PIN_AF14 -to clk_bot1 +set_instance_assignment -name IO_STANDARD "1.5 V" -to clk_top1 +set_instance_assignment -name IO_STANDARD "1.5 V" -to clk_bot1 + +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_a +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_ba +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_casn +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_cke +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_clk_n +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_clk_p +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_csn +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_dm +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_dq +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_dqs_n +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_dqs_p +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_odt +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_rasn +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_resetn +set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_fpga_wen +set_instance_assignment -name IO_STANDARD "1.5 V" -to ddr3_fpga_rzq +set_location_assignment PIN_AJ14 -to ddr3_fpga_a[0] +set_location_assignment PIN_AK14 -to ddr3_fpga_a[1] +set_location_assignment PIN_AH12 -to ddr3_fpga_a[2] +set_location_assignment PIN_AJ12 -to ddr3_fpga_a[3] +set_location_assignment PIN_AG15 -to ddr3_fpga_a[4] +set_location_assignment PIN_AH15 -to ddr3_fpga_a[5] +set_location_assignment PIN_AK12 -to ddr3_fpga_a[6] +set_location_assignment PIN_AK13 -to ddr3_fpga_a[7] +set_location_assignment PIN_AH13 -to ddr3_fpga_a[8] +set_location_assignment PIN_AH14 -to ddr3_fpga_a[9] +set_location_assignment PIN_AJ9 -to ddr3_fpga_a[10] +set_location_assignment PIN_AK9 -to ddr3_fpga_a[11] +set_location_assignment PIN_AK7 -to ddr3_fpga_a[12] +set_location_assignment PIN_AK8 -to ddr3_fpga_a[13] +set_location_assignment PIN_AG12 -to ddr3_fpga_a[14] +set_location_assignment PIN_AH10 -to ddr3_fpga_ba[0] +set_location_assignment PIN_AJ11 -to ddr3_fpga_ba[1] +set_location_assignment PIN_AK11 -to ddr3_fpga_ba[2] +set_location_assignment PIN_AH7 -to ddr3_fpga_casn +set_location_assignment PIN_AJ21 -to ddr3_fpga_cke +set_location_assignment PIN_AA15 -to ddr3_fpga_clk_n +set_location_assignment PIN_AA14 -to ddr3_fpga_clk_p +set_location_assignment PIN_AB15 -to ddr3_fpga_csn +set_location_assignment PIN_AH17 -to ddr3_fpga_dm[0] +set_location_assignment PIN_AG23 -to ddr3_fpga_dm[1] +set_location_assignment PIN_AK23 -to ddr3_fpga_dm[2] +set_location_assignment PIN_AJ27 -to ddr3_fpga_dm[3] +set_location_assignment PIN_AF18 -to ddr3_fpga_dq[0] +set_location_assignment PIN_AE17 -to ddr3_fpga_dq[1] +set_location_assignment PIN_AG16 -to ddr3_fpga_dq[2] +set_location_assignment PIN_AF16 -to ddr3_fpga_dq[3] +set_location_assignment PIN_AH20 -to ddr3_fpga_dq[4] +set_location_assignment PIN_AG21 -to ddr3_fpga_dq[5] +set_location_assignment PIN_AJ16 -to ddr3_fpga_dq[6] +set_location_assignment PIN_AH18 -to ddr3_fpga_dq[7] +set_location_assignment PIN_AK18 -to ddr3_fpga_dq[8] +set_location_assignment PIN_AJ17 -to ddr3_fpga_dq[9] +set_location_assignment PIN_AG18 -to ddr3_fpga_dq[10] +set_location_assignment PIN_AK19 -to ddr3_fpga_dq[11] +set_location_assignment PIN_AG20 -to ddr3_fpga_dq[12] +set_location_assignment PIN_AF19 -to ddr3_fpga_dq[13] +set_location_assignment PIN_AJ20 -to ddr3_fpga_dq[14] +set_location_assignment PIN_AH24 -to ddr3_fpga_dq[15] +set_location_assignment PIN_AE19 -to ddr3_fpga_dq[16] +set_location_assignment PIN_AE18 -to ddr3_fpga_dq[17] +set_location_assignment PIN_AG22 -to ddr3_fpga_dq[18] +set_location_assignment PIN_AK22 -to ddr3_fpga_dq[19] +set_location_assignment PIN_AF21 -to ddr3_fpga_dq[20] +set_location_assignment PIN_AF20 -to ddr3_fpga_dq[21] +set_location_assignment PIN_AH23 -to ddr3_fpga_dq[22] +set_location_assignment PIN_AK24 -to ddr3_fpga_dq[23] +set_location_assignment PIN_AF24 -to ddr3_fpga_dq[24] +set_location_assignment PIN_AF23 -to ddr3_fpga_dq[25] +set_location_assignment PIN_AJ24 -to ddr3_fpga_dq[26] +set_location_assignment PIN_AK26 -to ddr3_fpga_dq[27] +set_location_assignment PIN_AE23 -to ddr3_fpga_dq[28] +set_location_assignment PIN_AE22 -to ddr3_fpga_dq[29] +set_location_assignment PIN_AG25 -to ddr3_fpga_dq[30] +set_location_assignment PIN_AK27 -to ddr3_fpga_dq[31] +set_location_assignment PIN_W16 -to ddr3_fpga_dqs_n[0] +set_location_assignment PIN_W17 -to ddr3_fpga_dqs_n[1] +set_location_assignment PIN_AA18 -to ddr3_fpga_dqs_n[2] +set_location_assignment PIN_AD19 -to ddr3_fpga_dqs_n[3] +set_location_assignment PIN_V16 -to ddr3_fpga_dqs_p[0] +set_location_assignment PIN_V17 -to ddr3_fpga_dqs_p[1] +set_location_assignment PIN_Y17 -to ddr3_fpga_dqs_p[2] +set_location_assignment PIN_AC20 -to ddr3_fpga_dqs_p[3] +set_location_assignment PIN_AE16 -to ddr3_fpga_odt +set_location_assignment PIN_AH8 -to ddr3_fpga_rasn +set_location_assignment PIN_AK21 -to ddr3_fpga_resetn +set_location_assignment PIN_AJ6 -to ddr3_fpga_wen +set_location_assignment PIN_AG17 -to ddr3_fpga_rzq + +set_global_assignment -name IOBANK_VCCIO 2.5V -section_id 5B +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_b[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blank_n +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_clk +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_g[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_hs +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[7] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[6] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[5] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[4] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_r[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_sync_n +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_vs +set_location_assignment PIN_Y21 -to vga_g[0] +set_location_assignment PIN_AA25 -to vga_g[1] +set_location_assignment PIN_AB26 -to vga_g[2] +set_location_assignment PIN_AB22 -to vga_g[3] +set_location_assignment PIN_AB23 -to vga_g[4] +set_location_assignment PIN_AA24 -to vga_g[5] +set_location_assignment PIN_AB25 -to vga_g[6] +set_location_assignment PIN_AE27 -to vga_g[7] +set_location_assignment PIN_W20 -to vga_clk +set_location_assignment PIN_AH3 -to vga_balnk_n +set_location_assignment PIN_AE28 -to vga_b[0] +set_location_assignment PIN_Y23 -to vga_b[1] +set_location_assignment PIN_Y24 -to vga_b[2] +set_location_assignment PIN_AG28 -to vga_b[3] +set_location_assignment PIN_AF28 -to vga_b[4] +set_location_assignment PIN_V23 -to vga_b[5] +set_location_assignment PIN_W24 -to vga_b[6] +set_location_assignment PIN_AF29 -to vga_b[7] +set_location_assignment PIN_AG5 -to vga_r[0] +set_location_assignment PIN_AA12 -to vga_r[1] +set_location_assignment PIN_AB12 -to vga_r[2] +set_location_assignment PIN_AF6 -to vga_r[3] +set_location_assignment PIN_AG6 -to vga_r[4] +set_location_assignment PIN_AJ2 -to vga_r[5] +set_location_assignment PIN_AH5 -to vga_r[6] +set_location_assignment PIN_AJ1 -to vga_r[7] +set_location_assignment PIN_AG2 -to vga_sync_n +set_location_assignment PIN_AC12 -to vga_vs +set_location_assignment PIN_AD12 -to vga_hs + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_adcdat +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_adclrck +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_bclk +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_dacdat +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_daclrck +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_i2c_sclk +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_i2c_sdat +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_mute +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to aud_xck +set_location_assignment PIN_AC27 -to aud_adcdat +set_location_assignment PIN_AG30 -to aud_adclrck +set_location_assignment PIN_AE7 -to aud_bclk +set_location_assignment PIN_AG3 -to aud_dacdat +set_location_assignment PIN_AH4 -to aud_daclrck +set_location_assignment PIN_AH30 -to aud_i2c_sclk +set_location_assignment PIN_AF30 -to aud_i2c_sdat +set_location_assignment PIN_AD26 -to aud_mute +set_location_assignment PIN_AC9 -to aud_xck +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to fan_ctrl +set_location_assignment PIN_AG27 -to fan_ctrl +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to irda_rxd +set_location_assignment PIN_AH2 -to irda_rxd + +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to temp_cs_n +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to temp_sclk +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to temp_mosi +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to temp_miso +set_location_assignment PIN_AF8 -to temp_cs_n +set_location_assignment PIN_AF9 -to temp_sclk +set_location_assignment PIN_AG7 -to temp_mosi +set_location_assignment PIN_AG1 -to temp_miso + + +#set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_clkin_n[1] +#set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_clkin_n[2] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_clkin_p[1] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_clkin_p[2] +#set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_clkout_n[1] +#set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_clkout_n[2] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_clkout_p[1] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_clkout_p[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_clk_in0 +set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_clk_out0 + +#set_instance_assignment -name IO_STANDARD HCSL -to hsmc_ref_clk_n +set_instance_assignment -name IO_STANDARD HCSL -to hsmc_ref_clk_p + +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[0] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[1] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[2] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[3] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[4] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[5] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[6] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[7] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[8] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[9] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[10] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[11] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[12] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[13] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[14] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[15] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_n[16] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[0] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[1] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[2] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[3] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[4] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[5] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[6] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[7] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[8] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[9] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[10] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[11] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[12] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[13] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[14] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[15] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_rx_p[16] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_scl +set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmc_sda +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[0] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[1] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[2] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[3] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[4] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[5] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[6] +#et_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[7] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[8] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[9] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[10] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[11] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[12] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[13] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[14] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[15] +#set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_n[16] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[0] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[1] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[2] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[3] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[4] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[5] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[6] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[7] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[8] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[9] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[10] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[11] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[12] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[13] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[14] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[15] +set_instance_assignment -name IO_STANDARD LVDS -to hsmc_tx_p[16] + + +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[0] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[1] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[2] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[3] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[4] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[5] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[6] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_rx_p[7] + +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[0] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[1] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[2] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[3] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[4] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[5] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[6] +set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to hsmc_gxb_tx_p[7] + +set_location_assignment PIN_AA26 -to hsmc_clkin_p[1] +set_location_assignment PIN_H15 -to hsmc_clkin_p[2] +set_location_assignment PIN_E7 -to hsmc_clkout_p[1] +set_location_assignment PIN_A11 -to hsmc_clkout_p[2] +set_location_assignment PIN_J14 -to hsmc_clk_in0 +set_location_assignment PIN_AD29 -to hsmc_clk_out0 + +set_location_assignment PIN_AE2 -to hsmc_gxb_rx_p[0] +set_location_assignment PIN_AC2 -to hsmc_gxb_rx_p[1] +set_location_assignment PIN_AA2 -to hsmc_gxb_rx_p[2] +set_location_assignment PIN_W2 -to hsmc_gxb_rx_p[3] +set_location_assignment PIN_U2 -to hsmc_gxb_rx_p[4] +set_location_assignment PIN_R2 -to hsmc_gxb_rx_p[5] +set_location_assignment PIN_N2 -to hsmc_gxb_rx_p[6] +#set_location_assignment PIN_L2 -to hsmc_gxb_rx_p[7] +set_location_assignment PIN_J2 -to hsmc_gxb_rx_p[7] + +set_location_assignment PIN_AD4 -to hsmc_gxb_tx_p[0] +set_location_assignment PIN_AB4 -to hsmc_gxb_tx_p[1] +set_location_assignment PIN_Y4 -to hsmc_gxb_tx_p[2] +set_location_assignment PIN_V4 -to hsmc_gxb_tx_p[3] +set_location_assignment PIN_T4 -to hsmc_gxb_tx_p[4] +set_location_assignment PIN_P4 -to hsmc_gxb_tx_p[5] +set_location_assignment PIN_M4 -to hsmc_gxb_tx_p[6] +#set_location_assignment PIN_K4 -to hsmc_gxb_tx_p[7] +set_location_assignment PIN_H4 -to hsmc_gxb_tx_p[7] + +#set_location_assignment PIN_W7 -to hsmc_ref_clk_n +set_location_assignment PIN_P9 -to hsmc_ref_clk_p +#set_location_assignment PIN_T8 -to hsmc_ref_clk_p + +set_location_assignment PIN_G12 -to hsmc_rx_p[0] +#set_location_assignment PIN_G11 -to hsmc_rx_n[0] +set_location_assignment PIN_K12 -to hsmc_rx_p[1] +#set_location_assignment PIN_J12 -to hsmc_rx_n[1] +set_location_assignment PIN_G10 -to hsmc_rx_p[2] +#set_location_assignment PIN_F10 -to hsmc_rx_n[2] +set_location_assignment PIN_J10 -to hsmc_rx_p[3] +#set_location_assignment PIN_J9 -to hsmc_rx_n[3] +set_location_assignment PIN_K7 -to hsmc_rx_p[4] +#set_location_assignment PIN_K8 -to hsmc_rx_n[4] +set_location_assignment PIN_J7 -to hsmc_rx_p[5] +#set_location_assignment PIN_H7 -to hsmc_rx_n[5] +set_location_assignment PIN_H8 -to hsmc_rx_p[6] +#set_location_assignment PIN_G8 -to hsmc_rx_n[6] +set_location_assignment PIN_F9 -to hsmc_rx_p[7] +#set_location_assignment PIN_F8 -to hsmc_rx_n[7] +set_location_assignment PIN_F11 -to hsmc_rx_p[8] +#set_location_assignment PIN_E11 -to hsmc_rx_n[8] +set_location_assignment PIN_B6 -to hsmc_rx_p[9] +#set_location_assignment PIN_B5 -to hsmc_rx_n[9] +set_location_assignment PIN_E9 -to hsmc_rx_p[10] +#set_location_assignment PIN_D9 -to hsmc_rx_n[10] +set_location_assignment PIN_E12 -to hsmc_rx_p[11] +#set_location_assignment PIN_D12 -to hsmc_rx_n[11] +set_location_assignment PIN_D11 -to hsmc_rx_p[12] +#set_location_assignment PIN_D10 -to hsmc_rx_n[12] +set_location_assignment PIN_C13 -to hsmc_rx_p[13] +#set_location_assignment PIN_B12 -to hsmc_rx_n[13] +set_location_assignment PIN_F13 -to hsmc_rx_p[14] +#set_location_assignment PIN_E13 -to hsmc_rx_n[14] +set_location_assignment PIN_H14 -to hsmc_rx_p[15] +#set_location_assignment PIN_G13 -to hsmc_rx_n[15] +set_location_assignment PIN_F15 -to hsmc_rx_p[16] +#set_location_assignment PIN_F14 -to hsmc_rx_n[16] + + +set_location_assignment PIN_A9 -to hsmc_tx_p[0] +#set_location_assignment PIN_A8 -to hsmc_tx_n[0] +set_location_assignment PIN_E8 -to hsmc_tx_p[1] +#set_location_assignment PIN_D7 -to hsmc_tx_n[1] +set_location_assignment PIN_G7 -to hsmc_tx_p[2] +#set_location_assignment PIN_F6 -to hsmc_tx_n[2] +set_location_assignment PIN_D6 -to hsmc_tx_p[3] +#set_location_assignment PIN_C5 -to hsmc_tx_n[3] +set_location_assignment PIN_D5 -to hsmc_tx_p[4] +#set_location_assignment PIN_C4 -to hsmc_tx_n[4] +set_location_assignment PIN_E3 -to hsmc_tx_p[5] +#set_location_assignment PIN_E2 -to hsmc_tx_n[5] +set_location_assignment PIN_E4 -to hsmc_tx_p[6] +#set_location_assignment PIN_D4 -to hsmc_tx_n[6] +set_location_assignment PIN_C3 -to hsmc_tx_p[7] +#set_location_assignment PIN_B3 -to hsmc_tx_n[7] +set_location_assignment PIN_D1 -to hsmc_tx_n[8] +#set_location_assignment PIN_E1 -to hsmc_tx_p[8] +set_location_assignment PIN_D2 -to hsmc_tx_p[9] +#set_location_assignment PIN_C2 -to hsmc_tx_n[9] +set_location_assignment PIN_B2 -to hsmc_tx_p[10] +#set_location_assignment PIN_B1 -to hsmc_tx_n[10] +set_location_assignment PIN_A4 -to hsmc_tx_p[11] +#set_location_assignment PIN_A3 -to hsmc_tx_n[11] +set_location_assignment PIN_A6 -to hsmc_tx_p[12] +#set_location_assignment PIN_A5 -to hsmc_tx_n[12] +set_location_assignment PIN_C7 -to hsmc_tx_p[13] +#set_location_assignment PIN_B7 -to hsmc_tx_n[13] +set_location_assignment PIN_C8 -to hsmc_tx_p[14] +#set_location_assignment PIN_B8 -to hsmc_tx_n[14] +set_location_assignment PIN_C12 -to hsmc_tx_p[15] +#set_location_assignment PIN_B11 -to hsmc_tx_n[15] +set_location_assignment PIN_B13 -to hsmc_tx_p[16] +#set_location_assignment PIN_A13 -to hsmc_tx_n[16] + +set_location_assignment PIN_C10 -to hsmc_d[0] +set_location_assignment PIN_H13 -to hsmc_d[1] +set_location_assignment PIN_C9 -to hsmc_d[2] +set_location_assignment PIN_H12 -to hsmc_d[3] + +set_location_assignment PIN_AA28 -to hsmc_scl +set_location_assignment PIN_AE29 -to hsmc_sda + +set_location_assignment PIN_W25 -to user_dipsw_fpga[0] +set_location_assignment PIN_V25 -to user_dipsw_fpga[1] +set_location_assignment PIN_AC28 -to user_dipsw_fpga[2] +set_location_assignment PIN_AC29 -to user_dipsw_fpga[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to user_dipsw_fpga[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to user_dipsw_fpga[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to user_dipsw_fpga[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to user_dipsw_fpga[3] +set_location_assignment PIN_AF10 -to user_led_fpga[0] +set_location_assignment PIN_AD10 -to user_led_fpga[1] +set_location_assignment PIN_AE11 -to user_led_fpga[2] +set_location_assignment PIN_AD7 -to user_led_fpga[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_led_fpga[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_led_fpga[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_led_fpga[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_led_fpga[3] +set_location_assignment PIN_AE9 -to user_pb_fpga[0] +set_location_assignment PIN_AE12 -to user_pb_fpga[1] +set_location_assignment PIN_AD9 -to user_pb_fpga[2] +set_location_assignment PIN_AD11 -to user_pb_fpga[3] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_pb_fpga[0] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_pb_fpga[1] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_pb_fpga[2] +set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to user_pb_fpga[3] + +############################################################################################# +## FILES +############################################################################################# diff --git a/fpga/top/sockit.qip b/fpga/top/sockit.qip new file mode 100644 index 0000000..4747ac4 --- /dev/null +++ b/fpga/top/sockit.qip @@ -0,0 +1,2 @@ +set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "sockit.vhd"] +set_global_assignment -name SDC_FILE [file join $::quartus(qip_path) "sockit.sdc"] diff --git a/fpga/top/sockit.sdc b/fpga/top/sockit.sdc new file mode 100644 index 0000000..01fd1d0 --- /dev/null +++ b/fpga/top/sockit.sdc @@ -0,0 +1,117 @@ +create_clock -period 10.000ns [get_ports clk_100] +create_clock -period 20.000ns [get_ports clk_50] +create_clock -period 20.000ns [get_ports clk_top1] +create_clock -period 20.000ns [get_ports clk_bot1] + +# usb blasterii 25mhz +create_clock -name {altera_reserved_tck} -period 40 {altera_reserved_tck} +set_input_delay -clock altera_reserved_tck -clock_fall 3 [get_ports altera_reserved_tdi] +set_input_delay -clock altera_reserved_tck -clock_fall 3 [get_ports altera_reserved_tms] +set_output_delay -clock altera_reserved_tck -clock_fall 3 [get_ports altera_reserved_tdo] + +derive_pll_clocks +derive_clock_uncertainty + +# fpga io port constraints +set_false_path -from [get_ports {user_pb_fpga[0]}] -to * +set_false_path -from [get_ports {user_pb_fpga[1]}] -to * +set_false_path -from [get_ports {user_pb_fpga[2]}] -to * +set_false_path -from [get_ports {user_pb_fpga[3]}] -to * +set_false_path -from [get_ports {user_dipsw_fpga[0]}] -to * +set_false_path -from [get_ports {user_dipsw_fpga[1]}] -to * +set_false_path -from [get_ports {user_dipsw_fpga[2]}] -to * +set_false_path -from [get_ports {user_dipsw_fpga[3]}] -to * +set_false_path -from * -to [get_ports {user_led_fpga[0]}] +set_false_path -from * -to [get_ports {user_led_fpga[1]}] +set_false_path -from * -to [get_ports {user_led_fpga[2]}] +set_false_path -from * -to [get_ports {user_led_fpga[3]}] + +# hps peripherals port false path +set_false_path -from * -to [get_ports {hps_emac1_inst_tx_clk}] +set_false_path -from * -to [get_ports {hps_emac1_inst_txd0}] +set_false_path -from * -to [get_ports {hps_emac1_inst_txd1}] +set_false_path -from * -to [get_ports {hps_emac1_inst_txd2}] +set_false_path -from * -to [get_ports {hps_emac1_inst_txd3}] +set_false_path -from * -to [get_ports {hps_emac1_inst_mdc}] +set_false_path -from * -to [get_ports {hps_emac1_inst_tx_ctl}] +set_false_path -from * -to [get_ports {hps_qspi_inst_ss0}] +set_false_path -from * -to [get_ports {hps_qspi_inst_clk}] +set_false_path -from * -to [get_ports {hps_sdio_inst_clk}] +set_false_path -from * -to [get_ports {hps_usb1_inst_stp}] +set_false_path -from * -to [get_ports {hps_spim0_clk}] +set_false_path -from * -to [get_ports {hps_spim0_mosi}] +set_false_path -from * -to [get_ports {hps_spim0_ss0}] + +set_false_path -from * -to [get_ports {hps_spim1_clk}] +set_false_path -from * -to [get_ports {hps_spim1_mosi}] +set_false_path -from * -to [get_ports {hps_spim1_ss0}] + +set_false_path -from * -to [get_ports {hps_uart0_inst_tx}] +#set_false_path -from * -to [get_ports {hps_uart0_inst_rx}] + +set_false_path -from * -to [get_ports {hps_emac1_inst_mdio}] +set_false_path -from * -to [get_ports {hps_qspi_inst_io0}] +set_false_path -from * -to [get_ports {hps_qspi_inst_io1}] +set_false_path -from * -to [get_ports {hps_qspi_inst_io2}] +set_false_path -from * -to [get_ports {hps_qspi_inst_io3}] +set_false_path -from * -to [get_ports {hps_sdio_inst_cmd}] +set_false_path -from * -to [get_ports {hps_sdio_inst_d0}] +set_false_path -from * -to [get_ports {hps_sdio_inst_d1}] +set_false_path -from * -to [get_ports {hps_sdio_inst_d2}] +set_false_path -from * -to [get_ports {hps_sdio_inst_d3}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d0}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d1}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d2}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d3}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d4}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d5}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d6}] +set_false_path -from * -to [get_ports {hps_usb1_inst_d7}] +set_false_path -from * -to [get_ports {hps_i2c1_inst_sda}] +set_false_path -from * -to [get_ports {hps_i2c1_inst_scl}] +set_false_path -from * -to [get_ports {hps_gpio_inst_gpio09}] +set_false_path -from * -to [get_ports {hps_gpio_inst_gpio35}] +set_false_path -from * -to [get_ports {hps_gpio_inst_gpio41}] +set_false_path -from * -to [get_ports {hps_gpio_inst_gpio42}] +set_false_path -from * -to [get_ports {hps_gpio_inst_gpio43}] +set_false_path -from * -to [get_ports {hps_gpio_inst_gpio44}] + +set_false_path -from [get_ports {hps_emac1_inst_mdio}] -to * +set_false_path -from [get_ports {hps_qspi_inst_io0}] -to * +set_false_path -from [get_ports {hps_qspi_inst_io1}] -to * +set_false_path -from [get_ports {hps_qspi_inst_io2}] -to * +set_false_path -from [get_ports {hps_qspi_inst_io3}] -to * +set_false_path -from [get_ports {hps_sdio_inst_cmd}] -to * +set_false_path -from [get_ports {hps_sdio_inst_d0}] -to * +set_false_path -from [get_ports {hps_sdio_inst_d1}] -to * +set_false_path -from [get_ports {hps_sdio_inst_d2}] -to * +set_false_path -from [get_ports {hps_sdio_inst_d3}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d0}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d1}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d2}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d3}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d4}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d5}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d6}] -to * +set_false_path -from [get_ports {hps_usb1_inst_d7}] -to * +set_false_path -from [get_ports {hps_i2c1_inst_sda}] -to * +set_false_path -from [get_ports {hps_i2c1_inst_scl}] -to * +set_false_path -from [get_ports {hps_gpio_inst_gpio09}] -to * +set_false_path -from [get_ports {hps_gpio_inst_gpio35}] -to * +set_false_path -from [get_ports {hps_gpio_inst_gpio41}] -to * +set_false_path -from [get_ports {hps_gpio_inst_gpio42}] -to * +set_false_path -from [get_ports {hps_gpio_inst_gpio43}] -to * +set_false_path -from [get_ports {hps_gpio_inst_gpio44}] -to * + +set_false_path -from [get_ports {hps_emac1_inst_rx_ctl}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rx_clk}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rxd0}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rxd1}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rxd2}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rxd3}] -to * +set_false_path -from [get_ports {hps_emac1_inst_clk}] -to * +set_false_path -from [get_ports {hps_emac1_inst_dir}] -to * +set_false_path -from [get_ports {hps_emac1_inst_nxt}] -to * +set_false_path -from [get_ports {hps_emac1_inst_miso}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rx}] -to * +set_false_path -from [get_ports {hps_emac1_inst_rx}] -to * diff --git a/fpga/top/sockit.vhd b/fpga/top/sockit.vhd new file mode 100644 index 0000000..0dbcff9 --- /dev/null +++ b/fpga/top/sockit.vhd @@ -0,0 +1,299 @@ +-- ----------------------------------------------------------------------------- +-- Copyright (c) 2014 Benjamin Krill +-- +-- Permission is hereby granted, free of charge, to any person obtaining a copy +-- of this software and associated documentation files (the "Software"), to deal +-- in the Software without restriction, including without limitation the rights +-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +-- copies of the Software, and to permit persons to whom the Software is +-- furnished to do so, subject to the following conditions: +-- +-- The above copyright notice and this permission notice shall be included in +-- all copies or substantial portions of the Software. +-- +-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +-- THE SOFTWARE. +-- ----------------------------------------------------------------------------- +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library soc_system; +use soc_system.all; + +entity sockit is + port ( + clk : in std_logic; + reset_n : in std_logic; + + hps_mem_a : out std_logic_vector(14 downto 0); + hps_mem_ba : out std_logic_vector( 2 downto 0); + hps_mem_ck : out std_logic; + hps_mem_ck_n : out std_logic; + hps_mem_cke : out std_logic; + hps_mem_cs_n : out std_logic; + hps_mem_ras_n : out std_logic; + hps_mem_cas_n : out std_logic; + hps_mem_we_n : out std_logic; + hps_mem_reset_n : out std_logic; + hps_mem_dq : inout std_logic_vector(31 downto 0); + hps_mem_dqs : inout std_logic_vector( 3 downto 0); + hps_mem_dqs_n : inout std_logic_vector( 3 downto 0); + hps_mem_odt : out std_logic; + hps_mem_dm : out std_logic_vector( 3 downto 0); + hps_oct_rzqin : in std_logic; + hps_emac1_inst_tx_clk : out std_logic; + hps_emac1_inst_txd0 : out std_logic; + hps_emac1_inst_txd1 : out std_logic; + hps_emac1_inst_txd2 : out std_logic; + hps_emac1_inst_txd3 : out std_logic; + hps_emac1_inst_rxd0 : in std_logic; + hps_emac1_inst_mdio : inout std_logic; + hps_emac1_inst_mdc : out std_logic; + hps_emac1_inst_rx_ctl : in std_logic; + hps_emac1_inst_tx_ctl : out std_logic; + hps_emac1_inst_rx_clk : in std_logic; + hps_emac1_inst_rxd1 : in std_logic; + hps_emac1_inst_rxd2 : in std_logic; + hps_emac1_inst_rxd3 : in std_logic; + hps_qspi_inst_io0 : inout std_logic; + hps_qspi_inst_io1 : inout std_logic; + hps_qspi_inst_io2 : inout std_logic; + hps_qspi_inst_io3 : inout std_logic; + hps_qspi_inst_ss0 : out std_logic; + hps_qspi_inst_clk : out std_logic; + hps_sdio_inst_cmd : inout std_logic; + hps_sdio_inst_d0 : inout std_logic; + hps_sdio_inst_d1 : inout std_logic; + hps_sdio_inst_clk : out std_logic; + hps_sdio_inst_d2 : inout std_logic; + hps_sdio_inst_d3 : inout std_logic; + hps_usb1_inst_d0 : inout std_logic; + hps_usb1_inst_d1 : inout std_logic; + hps_usb1_inst_d2 : inout std_logic; + hps_usb1_inst_d3 : inout std_logic; + hps_usb1_inst_d4 : inout std_logic; + hps_usb1_inst_d5 : inout std_logic; + hps_usb1_inst_d6 : inout std_logic; + hps_usb1_inst_d7 : inout std_logic; + hps_usb1_inst_clk : in std_logic; + hps_usb1_inst_stp : out std_logic; + hps_usb1_inst_dir : in std_logic; + hps_usb1_inst_nxt : in std_logic; + hps_spim0_inst_clk : out std_logic; + hps_spim0_inst_mosi : out std_logic; + hps_spim0_inst_miso : in std_logic; + hps_spim0_inst_ss0 : out std_logic; + hps_spim1_inst_clk : out std_logic; + hps_spim1_inst_mosi : out std_logic; + hps_spim1_inst_miso : in std_logic; + hps_spim1_inst_ss0 : out std_logic; + hps_uart0_inst_rx : in std_logic; + hps_uart0_inst_tx : out std_logic; + hps_i2c1_inst_sda : inout std_logic; + hps_i2c1_inst_scl : inout std_logic; + hps_gpio_inst_gpio00 : inout std_logic; + hps_gpio_inst_gpio09 : inout std_logic; + hps_gpio_inst_gpio35 : inout std_logic; + hps_gpio_inst_gpio48 : inout std_logic; + hps_gpio_inst_gpio53 : inout std_logic; + hps_gpio_inst_gpio54 : inout std_logic; + hps_gpio_inst_gpio55 : inout std_logic; + hps_gpio_inst_gpio56 : inout std_logic; + hps_gpio_inst_gpio61 : inout std_logic; + hps_gpio_inst_gpio62 : inout std_logic; + + -------------------------------------------------------------------------- + -- fpga interface + -------------------------------------------------------------------------- + clk_100 : in std_logic; -- 2.5v 100 mhz (2nd copy to max) + clk_50 : in std_logic; -- 2.5v 50mhz (2nd copy to max) + clk_top1 : in std_logic; -- 2.5v 156.25 mhz adjustable + clk_bot1 : in std_logic; -- 1.5v 100 mhz ajustable + fpga_reset_n : in std_logic; -- 2.5v nios cpu reset pushbutton + + -- silabs clock generator + clkgen_i2c_sclk : out std_logic; + clkgen_i2c_sdat : inout std_logic; + + -- user in/out + user_dipsw_fpga : in std_logic_vector(3 downto 0); + user_led_fpga : out std_logic_vector(3 downto 0); + user_pb_fpga : in std_logic_vector(3 downto 0); + irda_rxd : in std_logic; -- irda receive led + fan_ctrl : out std_logic; -- control for fan + + -- fpga ddr3 + ddr3_fpga_a : out std_logic_vector(14 downto 0); -- sstl15 address + ddr3_fpga_ba : out std_logic_vector( 2 downto 0); -- sstl15 bank address + ddr3_fpga_casn : out std_logic; -- sstl15 column address strobe + ddr3_fpga_cke : out std_logic; -- sstl15 clock enable + ddr3_fpga_clk_n : out std_logic; -- sstl15 diff clock - neg + ddr3_fpga_clk_p : out std_logic; -- sstl15 diff clock - pos + ddr3_fpga_csn : out std_logic; -- sstl15 chip select + ddr3_fpga_dm : out std_logic_vector( 3 downto 0); -- sstl15 data write mask + ddr3_fpga_dq : inout std_logic_vector(31 downto 0); -- sstl15 data bus + ddr3_fpga_dqs_n : inout std_logic_vector( 3 downto 0); -- sstl15 diff data strobe - neg + ddr3_fpga_dqs_p : inout std_logic_vector( 3 downto 0); -- sstl15 diff data strobe - pos + ddr3_fpga_odt : out std_logic; -- sstl15 on-die termination enable + ddr3_fpga_rasn : in std_logic; -- sstl15 row address strobe + ddr3_fpga_resetn : in std_logic; -- sstl15 reset + ddr3_fpga_wen : in std_logic; -- sstl15 write enable + ddr3_fpga_rzq : in std_logic; -- oct_rzqinon-die termination enable + --oct_rdn : in std_logic; -- sstl15 on-die termination enable + --oct_rup : in std_logic; -- sstl15 on-die termination enable + + -- temp. sensor + temp_cs_n : out std_logic; -- chip select + temp_sclk : out std_logic; -- slave clock + temp_mosi : out std_logic; -- data out + temp_miso : in std_logic; -- data in + + -- vga + vga_clk : out std_logic; -- video clock + vga_hs : out std_logic; -- horizontal synch + vga_vs : out std_logic; -- vertical synch + vga_r : out std_logic_vector( 7 downto 0); -- red + vga_g : out std_logic_vector( 7 downto 0); -- green + vga_b : out std_logic_vector( 7 downto 0); -- blue + vga_blank_n : in std_logic; -- composite blank control + vga_sync_n : in std_logic; -- composite synch control + + -- audio + aud_adcdat : in std_logic; -- adc serial data or i2c_sclk + aud_adclrck : in std_logic; -- fddr3e clock + aud_bclk : in std_logic; -- bit clock + aud_dacdat : out std_logic; -- dac serial data + aud_daclrck : inout std_logic; -- fddr3e clock + aud_i2c_sclk : out std_logic; + aud_i2c_sdat : inout std_logic; + aud_mute : out std_logic; + aud_xck : out std_logic; + + -- HSMC/HSMA +-- --hsmc_clkin_n : out std_logic_vector( 2 downto 1); +-- hsmc_clkin_p : out std_logic_vector( 2 downto 1); +-- --hsmc_clkout_n : out std_logic_vector( 2 downto 1); +-- hsmc_clkout_p : out std_logic_vector( 2 downto 1); +-- hsmc_clk_in0 : in std_logic; +-- hsmc_clk_out0 : out std_logic; +-- hsmc_d : inout std_logic_vector( 3 downto 0); +-- -- hsmc_xcvr +-- --hsmc_gxb_rx_n : in std_logic_vector( 7 downto 0); +-- hsmc_gxb_rx_p : in std_logic_vector( 7 downto 0); +-- --hsmc_gxb_tx_n : out std_logic_vector( 7 downto 0); +-- hsmc_gxb_tx_p : out std_logic_vector( 7 downto 0); +-- --hsmc_ref_clk_n : in std_logic; +-- hsmc_ref_clk_p : in std_logic; +-- --hsmc_rx_n : in std_logic_vector(16 downto 0); +-- hsmc_rx_p : in std_logic_vector(16 downto 0); +-- hsmc_scl : out std_logic; +-- hsmc_sda : inout std_logic; +-- --hsmc_tx_n : out std_logic_vector(16 downto 0); +-- hsmc_tx_p : out std_logic_vector(16 downto 0); +-- + -- qspi flash + fpga_epqc_data : inout std_logic_vector( 3 downto 0); -- flash data + fpga_epqc_dclk : out std_logic; -- data clock + fpga_epqc_ncso : out std_logic -- chip select + ); +end sockit; + +architecture sockit of sockit is + signal hps_fpga_reset_n : std_logic; + signal fpga_led_i : std_logic_vector(3 downto 0); +begin + soc_0: entity soc_system.soc_system + port map ( + clk_clk => clk_bot1, + reset_reset_n => hps_fpga_reset_n, + memory_mem_a => hps_mem_a, + memory_mem_ba => hps_mem_ba, + memory_mem_ck => hps_mem_ck, + memory_mem_ck_n => hps_mem_ck_n, + memory_mem_cke => hps_mem_cke, + memory_mem_cs_n => hps_mem_cs_n, + memory_mem_ras_n => hps_mem_ras_n, + memory_mem_cas_n => hps_mem_cas_n, + memory_mem_we_n => hps_mem_we_n, + memory_mem_reset_n => hps_mem_reset_n, + memory_mem_dq => hps_mem_dq, + memory_mem_dqs => hps_mem_dqs, + memory_mem_dqs_n => hps_mem_dqs_n, + memory_mem_odt => hps_mem_odt, + memory_mem_dm => hps_mem_dm, + memory_oct_rzqin => hps_oct_rzqin, + hps_0_hps_io_hps_io_emac1_inst_TX_CLK => hps_emac1_inst_tx_clk, + hps_0_hps_io_hps_io_emac1_inst_TXD0 => hps_emac1_inst_txd0, + hps_0_hps_io_hps_io_emac1_inst_TXD1 => hps_emac1_inst_txd1, + hps_0_hps_io_hps_io_emac1_inst_TXD2 => hps_emac1_inst_txd2, + hps_0_hps_io_hps_io_emac1_inst_TXD3 => hps_emac1_inst_txd3, + hps_0_hps_io_hps_io_emac1_inst_RXD0 => hps_emac1_inst_rxd0, + hps_0_hps_io_hps_io_emac1_inst_MDIO => hps_emac1_inst_mdio, + hps_0_hps_io_hps_io_emac1_inst_MDC => hps_emac1_inst_mdc, + hps_0_hps_io_hps_io_emac1_inst_RX_CTL => hps_emac1_inst_rx_ctl, + hps_0_hps_io_hps_io_emac1_inst_TX_CTL => hps_emac1_inst_tx_ctl, + hps_0_hps_io_hps_io_emac1_inst_RX_CLK => hps_emac1_inst_rx_clk, + hps_0_hps_io_hps_io_emac1_inst_RXD1 => hps_emac1_inst_rxd1, + hps_0_hps_io_hps_io_emac1_inst_RXD2 => hps_emac1_inst_rxd2, + hps_0_hps_io_hps_io_emac1_inst_RXD3 => hps_emac1_inst_rxd3, + hps_0_hps_io_hps_io_qspi_inst_IO0 => hps_qspi_inst_io0, + hps_0_hps_io_hps_io_qspi_inst_IO1 => hps_qspi_inst_io1, + hps_0_hps_io_hps_io_qspi_inst_IO2 => hps_qspi_inst_io2, + hps_0_hps_io_hps_io_qspi_inst_IO3 => hps_qspi_inst_io3, + hps_0_hps_io_hps_io_qspi_inst_SS0 => hps_qspi_inst_ss0, + hps_0_hps_io_hps_io_qspi_inst_CLK => hps_qspi_inst_clk, + hps_0_hps_io_hps_io_sdio_inst_CMD => hps_sdio_inst_cmd, + hps_0_hps_io_hps_io_sdio_inst_D0 => hps_sdio_inst_d0, + hps_0_hps_io_hps_io_sdio_inst_D1 => hps_sdio_inst_d1, + hps_0_hps_io_hps_io_sdio_inst_CLK => hps_sdio_inst_clk, + hps_0_hps_io_hps_io_sdio_inst_D2 => hps_sdio_inst_d2, + hps_0_hps_io_hps_io_sdio_inst_D3 => hps_sdio_inst_d3, + hps_0_hps_io_hps_io_usb1_inst_D0 => hps_usb1_inst_d0, + hps_0_hps_io_hps_io_usb1_inst_D1 => hps_usb1_inst_d1, + hps_0_hps_io_hps_io_usb1_inst_D2 => hps_usb1_inst_d2, + hps_0_hps_io_hps_io_usb1_inst_D3 => hps_usb1_inst_d3, + hps_0_hps_io_hps_io_usb1_inst_D4 => hps_usb1_inst_d4, + hps_0_hps_io_hps_io_usb1_inst_D5 => hps_usb1_inst_d5, + hps_0_hps_io_hps_io_usb1_inst_D6 => hps_usb1_inst_d6, + hps_0_hps_io_hps_io_usb1_inst_D7 => hps_usb1_inst_d7, + hps_0_hps_io_hps_io_usb1_inst_CLK => hps_usb1_inst_clk, + hps_0_hps_io_hps_io_usb1_inst_STP => hps_usb1_inst_stp, + hps_0_hps_io_hps_io_usb1_inst_DIR => hps_usb1_inst_dir, + hps_0_hps_io_hps_io_usb1_inst_NXT => hps_usb1_inst_nxt, + hps_0_hps_io_hps_io_spim0_inst_CLK => hps_spim0_inst_clk, + hps_0_hps_io_hps_io_spim0_inst_MOSI => hps_spim0_inst_mosi, + hps_0_hps_io_hps_io_spim0_inst_MISO => hps_spim0_inst_miso, + hps_0_hps_io_hps_io_spim0_inst_SS0 => hps_spim0_inst_ss0, + hps_0_hps_io_hps_io_spim1_inst_CLK => hps_spim1_inst_clk, + hps_0_hps_io_hps_io_spim1_inst_MOSI => hps_spim1_inst_mosi, + hps_0_hps_io_hps_io_spim1_inst_MISO => hps_spim1_inst_miso, + hps_0_hps_io_hps_io_spim1_inst_SS0 => hps_spim1_inst_ss0, + hps_0_hps_io_hps_io_uart0_inst_RX => hps_uart0_inst_rx, + hps_0_hps_io_hps_io_uart0_inst_TX => hps_uart0_inst_tx, + hps_0_hps_io_hps_io_i2c1_inst_SDA => hps_i2c1_inst_sda, + hps_0_hps_io_hps_io_i2c1_inst_SCL => hps_i2c1_inst_scl, + hps_0_hps_io_hps_io_gpio_inst_GPIO00 => hps_gpio_inst_gpio00, + hps_0_hps_io_hps_io_gpio_inst_GPIO09 => hps_gpio_inst_gpio09, + hps_0_hps_io_hps_io_gpio_inst_GPIO35 => hps_gpio_inst_gpio35, + hps_0_hps_io_hps_io_gpio_inst_GPIO48 => hps_gpio_inst_gpio48, + hps_0_hps_io_hps_io_gpio_inst_GPIO53 => hps_gpio_inst_gpio53, + hps_0_hps_io_hps_io_gpio_inst_GPIO54 => hps_gpio_inst_gpio54, + hps_0_hps_io_hps_io_gpio_inst_GPIO55 => hps_gpio_inst_gpio55, + hps_0_hps_io_hps_io_gpio_inst_GPIO56 => hps_gpio_inst_gpio56, + hps_0_hps_io_hps_io_gpio_inst_GPIO61 => hps_gpio_inst_gpio61, + hps_0_hps_io_hps_io_gpio_inst_GPIO62 => hps_gpio_inst_gpio62, + led_pio_external_connection_in_port => fpga_led_i, + led_pio_external_connection_out_port => fpga_led_i, + dipsw_pio_external_connection_export => user_dipsw_fpga, + button_pio_external_connection_export => user_pb_fpga(1 downto 0), + hps_0_h2f_reset_reset_n => hps_fpga_reset_n, + clock_bridge_65_out_clk_clk => open + ); + +end sockit;