297 lines
18 KiB
VHDL
297 lines
18 KiB
VHDL
-- -----------------------------------------------------------------------------
|
|
-- Copyright (c) 2014 Benjamin Krill <benjamin@krll.de>
|
|
--
|
|
-- Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
-- of this software and associated documentation files (the "Software"), to deal
|
|
-- in the Software without restriction, including without limitation the rights
|
|
-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
-- copies of the Software, and to permit persons to whom the Software is
|
|
-- furnished to do so, subject to the following conditions:
|
|
--
|
|
-- The above copyright notice and this permission notice shall be included in
|
|
-- all copies or substantial portions of the Software.
|
|
--
|
|
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
-- THE SOFTWARE.
|
|
-- -----------------------------------------------------------------------------
|
|
library ieee;
|
|
use ieee.std_logic_1164.all;
|
|
use ieee.numeric_std.all;
|
|
|
|
library soc_system;
|
|
use soc_system.all;
|
|
|
|
entity sockit is
|
|
port (
|
|
hps_mem_a : out std_logic_vector(14 downto 0);
|
|
hps_mem_ba : out std_logic_vector( 2 downto 0);
|
|
hps_mem_ck : out std_logic;
|
|
hps_mem_ck_n : out std_logic;
|
|
hps_mem_cke : out std_logic;
|
|
hps_mem_cs_n : out std_logic;
|
|
hps_mem_ras_n : out std_logic;
|
|
hps_mem_cas_n : out std_logic;
|
|
hps_mem_we_n : out std_logic;
|
|
hps_mem_reset_n : out std_logic;
|
|
hps_mem_dq : inout std_logic_vector(31 downto 0);
|
|
hps_mem_dqs : inout std_logic_vector( 3 downto 0);
|
|
hps_mem_dqs_n : inout std_logic_vector( 3 downto 0);
|
|
hps_mem_odt : out std_logic;
|
|
hps_mem_dm : out std_logic_vector( 3 downto 0);
|
|
hps_oct_rzqin : in std_logic;
|
|
hps_emac1_inst_tx_clk : out std_logic;
|
|
hps_emac1_inst_txd0 : out std_logic;
|
|
hps_emac1_inst_txd1 : out std_logic;
|
|
hps_emac1_inst_txd2 : out std_logic;
|
|
hps_emac1_inst_txd3 : out std_logic;
|
|
hps_emac1_inst_rxd0 : in std_logic;
|
|
hps_emac1_inst_mdio : inout std_logic;
|
|
hps_emac1_inst_mdc : out std_logic;
|
|
hps_emac1_inst_rx_ctl : in std_logic;
|
|
hps_emac1_inst_tx_ctl : out std_logic;
|
|
hps_emac1_inst_rx_clk : in std_logic;
|
|
hps_emac1_inst_rxd1 : in std_logic;
|
|
hps_emac1_inst_rxd2 : in std_logic;
|
|
hps_emac1_inst_rxd3 : in std_logic;
|
|
hps_qspi_inst_io0 : inout std_logic;
|
|
hps_qspi_inst_io1 : inout std_logic;
|
|
hps_qspi_inst_io2 : inout std_logic;
|
|
hps_qspi_inst_io3 : inout std_logic;
|
|
hps_qspi_inst_ss0 : out std_logic;
|
|
hps_qspi_inst_clk : out std_logic;
|
|
hps_sdio_inst_cmd : inout std_logic;
|
|
hps_sdio_inst_d0 : inout std_logic;
|
|
hps_sdio_inst_d1 : inout std_logic;
|
|
hps_sdio_inst_clk : out std_logic;
|
|
hps_sdio_inst_d2 : inout std_logic;
|
|
hps_sdio_inst_d3 : inout std_logic;
|
|
hps_usb1_inst_d0 : inout std_logic;
|
|
hps_usb1_inst_d1 : inout std_logic;
|
|
hps_usb1_inst_d2 : inout std_logic;
|
|
hps_usb1_inst_d3 : inout std_logic;
|
|
hps_usb1_inst_d4 : inout std_logic;
|
|
hps_usb1_inst_d5 : inout std_logic;
|
|
hps_usb1_inst_d6 : inout std_logic;
|
|
hps_usb1_inst_d7 : inout std_logic;
|
|
hps_usb1_inst_clk : in std_logic;
|
|
hps_usb1_inst_stp : out std_logic;
|
|
hps_usb1_inst_dir : in std_logic;
|
|
hps_usb1_inst_nxt : in std_logic;
|
|
hps_spim0_inst_clk : out std_logic;
|
|
hps_spim0_inst_mosi : out std_logic;
|
|
hps_spim0_inst_miso : in std_logic;
|
|
hps_spim0_inst_ss0 : out std_logic;
|
|
hps_spim1_inst_clk : out std_logic;
|
|
hps_spim1_inst_mosi : out std_logic;
|
|
hps_spim1_inst_miso : in std_logic;
|
|
hps_spim1_inst_ss0 : out std_logic;
|
|
hps_uart0_inst_rx : in std_logic;
|
|
hps_uart0_inst_tx : out std_logic;
|
|
hps_i2c1_inst_sda : inout std_logic;
|
|
hps_i2c1_inst_scl : inout std_logic;
|
|
hps_gpio_inst_gpio00 : inout std_logic;
|
|
hps_gpio_inst_gpio09 : inout std_logic;
|
|
hps_gpio_inst_gpio35 : inout std_logic;
|
|
hps_gpio_inst_gpio48 : inout std_logic;
|
|
hps_gpio_inst_gpio53 : inout std_logic;
|
|
hps_gpio_inst_gpio54 : inout std_logic;
|
|
hps_gpio_inst_gpio55 : inout std_logic;
|
|
hps_gpio_inst_gpio56 : inout std_logic;
|
|
hps_gpio_inst_gpio61 : inout std_logic;
|
|
hps_gpio_inst_gpio62 : inout std_logic;
|
|
|
|
--------------------------------------------------------------------------
|
|
-- fpga interface
|
|
--------------------------------------------------------------------------
|
|
clk_100 : in std_logic; -- 2.5v 100 mhz (2nd copy to max)
|
|
clk_50 : in std_logic; -- 2.5v 50mhz (2nd copy to max)
|
|
clk_top1 : in std_logic; -- 2.5v 156.25 mhz adjustable
|
|
clk_bot1 : in std_logic; -- 1.5v 100 mhz ajustable
|
|
fpga_reset_n : in std_logic; -- 2.5v nios cpu reset pushbutton
|
|
|
|
-- silabs clock generator
|
|
clkgen_i2c_sclk : out std_logic;
|
|
clkgen_i2c_sdat : inout std_logic;
|
|
|
|
-- user in/out
|
|
user_dipsw_fpga : in std_logic_vector(3 downto 0);
|
|
user_led_fpga : out std_logic_vector(3 downto 0);
|
|
user_pb_fpga : in std_logic_vector(3 downto 0);
|
|
irda_rxd : in std_logic; -- irda receive led
|
|
fan_ctrl : out std_logic; -- control for fan
|
|
|
|
-- fpga ddr3
|
|
ddr3_fpga_a : out std_logic_vector(14 downto 0); -- sstl15 address
|
|
ddr3_fpga_ba : out std_logic_vector( 2 downto 0); -- sstl15 bank address
|
|
ddr3_fpga_casn : out std_logic; -- sstl15 column address strobe
|
|
ddr3_fpga_cke : out std_logic; -- sstl15 clock enable
|
|
ddr3_fpga_clk_n : out std_logic; -- sstl15 diff clock - neg
|
|
ddr3_fpga_clk_p : out std_logic; -- sstl15 diff clock - pos
|
|
ddr3_fpga_csn : out std_logic; -- sstl15 chip select
|
|
ddr3_fpga_dm : out std_logic_vector( 3 downto 0); -- sstl15 data write mask
|
|
ddr3_fpga_dq : inout std_logic_vector(31 downto 0); -- sstl15 data bus
|
|
ddr3_fpga_dqs_n : inout std_logic_vector( 3 downto 0); -- sstl15 diff data strobe - neg
|
|
ddr3_fpga_dqs_p : inout std_logic_vector( 3 downto 0); -- sstl15 diff data strobe - pos
|
|
ddr3_fpga_odt : out std_logic; -- sstl15 on-die termination enable
|
|
ddr3_fpga_rasn : in std_logic; -- sstl15 row address strobe
|
|
ddr3_fpga_resetn : in std_logic; -- sstl15 reset
|
|
ddr3_fpga_wen : in std_logic; -- sstl15 write enable
|
|
ddr3_fpga_rzq : in std_logic; -- oct_rzqinon-die termination enable
|
|
--oct_rdn : in std_logic; -- sstl15 on-die termination enable
|
|
--oct_rup : in std_logic; -- sstl15 on-die termination enable
|
|
|
|
-- temp. sensor
|
|
temp_cs_n : out std_logic; -- chip select
|
|
temp_sclk : out std_logic; -- slave clock
|
|
temp_mosi : out std_logic; -- data out
|
|
temp_miso : in std_logic; -- data in
|
|
|
|
-- vga
|
|
vga_clk : out std_logic; -- video clock
|
|
vga_hs : out std_logic; -- horizontal synch
|
|
vga_vs : out std_logic; -- vertical synch
|
|
vga_r : out std_logic_vector( 7 downto 0); -- red
|
|
vga_g : out std_logic_vector( 7 downto 0); -- green
|
|
vga_b : out std_logic_vector( 7 downto 0); -- blue
|
|
vga_blank_n : in std_logic; -- composite blank control
|
|
vga_sync_n : in std_logic; -- composite synch control
|
|
|
|
-- audio
|
|
aud_adcdat : in std_logic; -- adc serial data or i2c_sclk
|
|
aud_adclrck : in std_logic; -- fddr3e clock
|
|
aud_bclk : in std_logic; -- bit clock
|
|
aud_dacdat : out std_logic; -- dac serial data
|
|
aud_daclrck : inout std_logic; -- fddr3e clock
|
|
aud_i2c_sclk : out std_logic;
|
|
aud_i2c_sdat : inout std_logic;
|
|
aud_mute : out std_logic;
|
|
aud_xck : out std_logic;
|
|
|
|
-- HSMC/HSMA
|
|
-- --hsmc_clkin_n : out std_logic_vector( 2 downto 1);
|
|
-- hsmc_clkin_p : out std_logic_vector( 2 downto 1);
|
|
-- --hsmc_clkout_n : out std_logic_vector( 2 downto 1);
|
|
-- hsmc_clkout_p : out std_logic_vector( 2 downto 1);
|
|
-- hsmc_clk_in0 : in std_logic;
|
|
-- hsmc_clk_out0 : out std_logic;
|
|
-- hsmc_d : inout std_logic_vector( 3 downto 0);
|
|
-- -- hsmc_xcvr
|
|
-- --hsmc_gxb_rx_n : in std_logic_vector( 7 downto 0);
|
|
-- hsmc_gxb_rx_p : in std_logic_vector( 7 downto 0);
|
|
-- --hsmc_gxb_tx_n : out std_logic_vector( 7 downto 0);
|
|
-- hsmc_gxb_tx_p : out std_logic_vector( 7 downto 0);
|
|
-- --hsmc_ref_clk_n : in std_logic;
|
|
-- hsmc_ref_clk_p : in std_logic;
|
|
-- --hsmc_rx_n : in std_logic_vector(16 downto 0);
|
|
-- hsmc_rx_p : in std_logic_vector(16 downto 0);
|
|
-- hsmc_scl : out std_logic;
|
|
-- hsmc_sda : inout std_logic;
|
|
-- --hsmc_tx_n : out std_logic_vector(16 downto 0);
|
|
-- hsmc_tx_p : out std_logic_vector(16 downto 0);
|
|
--
|
|
-- qspi flash
|
|
fpga_epqc_data : inout std_logic_vector( 3 downto 0); -- flash data
|
|
fpga_epqc_dclk : out std_logic; -- data clock
|
|
fpga_epqc_ncso : out std_logic -- chip select
|
|
);
|
|
end sockit;
|
|
|
|
architecture sockit of sockit is
|
|
signal hps_fpga_reset_n : std_logic;
|
|
signal fpga_led_i : std_logic_vector(3 downto 0);
|
|
begin
|
|
soc_0: entity soc_system.soc_system
|
|
port map (
|
|
clk_clk => clk_bot1,
|
|
reset_reset_n => hps_fpga_reset_n,
|
|
memory_mem_a => hps_mem_a,
|
|
memory_mem_ba => hps_mem_ba,
|
|
memory_mem_ck => hps_mem_ck,
|
|
memory_mem_ck_n => hps_mem_ck_n,
|
|
memory_mem_cke => hps_mem_cke,
|
|
memory_mem_cs_n => hps_mem_cs_n,
|
|
memory_mem_ras_n => hps_mem_ras_n,
|
|
memory_mem_cas_n => hps_mem_cas_n,
|
|
memory_mem_we_n => hps_mem_we_n,
|
|
memory_mem_reset_n => hps_mem_reset_n,
|
|
memory_mem_dq => hps_mem_dq,
|
|
memory_mem_dqs => hps_mem_dqs,
|
|
memory_mem_dqs_n => hps_mem_dqs_n,
|
|
memory_mem_odt => hps_mem_odt,
|
|
memory_mem_dm => hps_mem_dm,
|
|
memory_oct_rzqin => hps_oct_rzqin,
|
|
hps_0_hps_io_hps_io_emac1_inst_TX_CLK => hps_emac1_inst_tx_clk,
|
|
hps_0_hps_io_hps_io_emac1_inst_TXD0 => hps_emac1_inst_txd0,
|
|
hps_0_hps_io_hps_io_emac1_inst_TXD1 => hps_emac1_inst_txd1,
|
|
hps_0_hps_io_hps_io_emac1_inst_TXD2 => hps_emac1_inst_txd2,
|
|
hps_0_hps_io_hps_io_emac1_inst_TXD3 => hps_emac1_inst_txd3,
|
|
hps_0_hps_io_hps_io_emac1_inst_RXD0 => hps_emac1_inst_rxd0,
|
|
hps_0_hps_io_hps_io_emac1_inst_MDIO => hps_emac1_inst_mdio,
|
|
hps_0_hps_io_hps_io_emac1_inst_MDC => hps_emac1_inst_mdc,
|
|
hps_0_hps_io_hps_io_emac1_inst_RX_CTL => hps_emac1_inst_rx_ctl,
|
|
hps_0_hps_io_hps_io_emac1_inst_TX_CTL => hps_emac1_inst_tx_ctl,
|
|
hps_0_hps_io_hps_io_emac1_inst_RX_CLK => hps_emac1_inst_rx_clk,
|
|
hps_0_hps_io_hps_io_emac1_inst_RXD1 => hps_emac1_inst_rxd1,
|
|
hps_0_hps_io_hps_io_emac1_inst_RXD2 => hps_emac1_inst_rxd2,
|
|
hps_0_hps_io_hps_io_emac1_inst_RXD3 => hps_emac1_inst_rxd3,
|
|
hps_0_hps_io_hps_io_qspi_inst_IO0 => hps_qspi_inst_io0,
|
|
hps_0_hps_io_hps_io_qspi_inst_IO1 => hps_qspi_inst_io1,
|
|
hps_0_hps_io_hps_io_qspi_inst_IO2 => hps_qspi_inst_io2,
|
|
hps_0_hps_io_hps_io_qspi_inst_IO3 => hps_qspi_inst_io3,
|
|
hps_0_hps_io_hps_io_qspi_inst_SS0 => hps_qspi_inst_ss0,
|
|
hps_0_hps_io_hps_io_qspi_inst_CLK => hps_qspi_inst_clk,
|
|
hps_0_hps_io_hps_io_sdio_inst_CMD => hps_sdio_inst_cmd,
|
|
hps_0_hps_io_hps_io_sdio_inst_D0 => hps_sdio_inst_d0,
|
|
hps_0_hps_io_hps_io_sdio_inst_D1 => hps_sdio_inst_d1,
|
|
hps_0_hps_io_hps_io_sdio_inst_CLK => hps_sdio_inst_clk,
|
|
hps_0_hps_io_hps_io_sdio_inst_D2 => hps_sdio_inst_d2,
|
|
hps_0_hps_io_hps_io_sdio_inst_D3 => hps_sdio_inst_d3,
|
|
hps_0_hps_io_hps_io_usb1_inst_D0 => hps_usb1_inst_d0,
|
|
hps_0_hps_io_hps_io_usb1_inst_D1 => hps_usb1_inst_d1,
|
|
hps_0_hps_io_hps_io_usb1_inst_D2 => hps_usb1_inst_d2,
|
|
hps_0_hps_io_hps_io_usb1_inst_D3 => hps_usb1_inst_d3,
|
|
hps_0_hps_io_hps_io_usb1_inst_D4 => hps_usb1_inst_d4,
|
|
hps_0_hps_io_hps_io_usb1_inst_D5 => hps_usb1_inst_d5,
|
|
hps_0_hps_io_hps_io_usb1_inst_D6 => hps_usb1_inst_d6,
|
|
hps_0_hps_io_hps_io_usb1_inst_D7 => hps_usb1_inst_d7,
|
|
hps_0_hps_io_hps_io_usb1_inst_CLK => hps_usb1_inst_clk,
|
|
hps_0_hps_io_hps_io_usb1_inst_STP => hps_usb1_inst_stp,
|
|
hps_0_hps_io_hps_io_usb1_inst_DIR => hps_usb1_inst_dir,
|
|
hps_0_hps_io_hps_io_usb1_inst_NXT => hps_usb1_inst_nxt,
|
|
hps_0_hps_io_hps_io_spim0_inst_CLK => hps_spim0_inst_clk,
|
|
hps_0_hps_io_hps_io_spim0_inst_MOSI => hps_spim0_inst_mosi,
|
|
hps_0_hps_io_hps_io_spim0_inst_MISO => hps_spim0_inst_miso,
|
|
hps_0_hps_io_hps_io_spim0_inst_SS0 => hps_spim0_inst_ss0,
|
|
hps_0_hps_io_hps_io_spim1_inst_CLK => hps_spim1_inst_clk,
|
|
hps_0_hps_io_hps_io_spim1_inst_MOSI => hps_spim1_inst_mosi,
|
|
hps_0_hps_io_hps_io_spim1_inst_MISO => hps_spim1_inst_miso,
|
|
hps_0_hps_io_hps_io_spim1_inst_SS0 => hps_spim1_inst_ss0,
|
|
hps_0_hps_io_hps_io_uart0_inst_RX => hps_uart0_inst_rx,
|
|
hps_0_hps_io_hps_io_uart0_inst_TX => hps_uart0_inst_tx,
|
|
hps_0_hps_io_hps_io_i2c1_inst_SDA => hps_i2c1_inst_sda,
|
|
hps_0_hps_io_hps_io_i2c1_inst_SCL => hps_i2c1_inst_scl,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO00 => hps_gpio_inst_gpio00,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO09 => hps_gpio_inst_gpio09,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO35 => hps_gpio_inst_gpio35,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO48 => hps_gpio_inst_gpio48,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO53 => hps_gpio_inst_gpio53,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO54 => hps_gpio_inst_gpio54,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO55 => hps_gpio_inst_gpio55,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO56 => hps_gpio_inst_gpio56,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO61 => hps_gpio_inst_gpio61,
|
|
hps_0_hps_io_hps_io_gpio_inst_GPIO62 => hps_gpio_inst_gpio62,
|
|
led_pio_external_connection_in_port => fpga_led_i,
|
|
led_pio_external_connection_out_port => fpga_led_i,
|
|
dipsw_pio_external_connection_export => user_dipsw_fpga,
|
|
button_pio_external_connection_export => user_pb_fpga(1 downto 0),
|
|
hps_0_h2f_reset_reset_n => hps_fpga_reset_n,
|
|
clock_bridge_65_out_clk_clk => open
|
|
);
|
|
|
|
end sockit;
|