59 lines
1.2 KiB
Plaintext
59 lines
1.2 KiB
Plaintext
set -tmpdir ../synth/__projnav
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set -xsthdpdir ../synth/xst
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run
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#Source Parameters
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-ifn ../synth/ddr2.prj
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-ifmt mixed
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-iuc No
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#Target Parameters
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-ofn ddr2
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-ofmt NGC
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-p xc6slx45-3csg324
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#AXI_ENABLE definition is not required for NATIVE interface
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#Source Options
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-top ddr2
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-fsm_extract Yes
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-fsm_encoding one-hot
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-safe_implementation No
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-fsm_style lut
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-ram_extract Yes
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-ram_style Auto
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-rom_extract Yes
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-rom_style Auto
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-shreg_extract Yes
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-resource_sharing Yes
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-async_to_sync no
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-mult_style auto
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-register_balancing No
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#Target Options
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-iobuf Yes
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#Max fanout value shouldn't be set below 64 for MCB design
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-max_fanout 500
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-bufg 16
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-register_duplication yes
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-optimize_primitives No
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-use_clock_enable Auto
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-use_sync_set Auto
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-use_sync_reset Auto
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-iob auto
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-equivalent_register_removal yes
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#General Options
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-opt_mode Speed
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-opt_level 1
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-lso ../synth/ddr2.lso
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-keep_hierarchy NO
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-netlist_hierarchy as_optimized
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-rtlview Yes
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-glob_opt allclocknets
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-read_cores Yes
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-write_timing_constraints No
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-cross_clock_analysis No
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-hierarchy_separator /
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-bus_delimiter <>
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-case maintain
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-slice_utilization_ratio 100
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-bram_utilization_ratio 100
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-auto_bram_packing No
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-slice_utilization_ratio_maxmargin 5
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quit
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